SENIOR ASIC DESIGN VERIFICATION ENGINEER
4 H1B filings at Marvell Semiconductor in FY2014
4
Total Filings
$105,525
Median Salary
50.0%
Approval Rate
2
Certified (0 denied)
Salary Distribution
Range shows where 80% of salaries fall. The marker indicates the median.
Range: $97,968 - $106,630
Salary Frequency
Hover over bars to see exact counts. Salary ranges in $25K increments.
Work Locations
SANTA CLARA, CA
4 filings
All Filings (4)
| Job Title | Location | Salary | Year | Status | View |
|---|---|---|---|---|---|
| SENIOR ASIC DESIGN VERIFICATION ENGINEER 17-2072 | Santa Clara, CA | $105,500 | FY2014 | CERTIFIED | View |
| SENIOR ASIC DESIGN VERIFICATION ENGINEER 17-2072 | Santa Clara, CA | $105,550 | FY2014 | WITHDRAWN | View |
| SENIOR ASIC DESIGN VERIFICATION ENGINEER 17-2072 | Santa Clara, CA | $97,968 | FY2014 | WITHDRAWN | View |
| SENIOR ASIC DESIGN VERIFICATION ENGINEER 17-2072 | Santa Clara, CA | $106,630 | FY2014 | CERTIFIED | View |
SENIOR ASIC DESIGN VERIFICATION ENGINEER CERTIFIED
Santa Clara, CA $105,500 FY2014
SENIOR ASIC DESIGN VERIFICATION ENGINEER WITHDRAWN
Santa Clara, CA $105,550 FY2014
SENIOR ASIC DESIGN VERIFICATION ENGINEER WITHDRAWN
Santa Clara, CA $97,968 FY2014
SENIOR ASIC DESIGN VERIFICATION ENGINEER CERTIFIED
Santa Clara, CA $106,630 FY2014