FPGA Silicon Design Verification Engineer
3 H1B filings at Altera in FY2025
3
Total Filings
$177,648
Median Salary
100.0%
Approval Rate
3
Certified (0 denied)
Salary Distribution
Range shows where 80% of salaries fall. The marker indicates the median.
Range: $150,904 - $189,848
Salary Frequency
Hover over bars to see exact counts. Salary ranges in $25K increments.
Work Locations
San Jose, CA
3 filings
All Filings (3)
| Job Title | Location | Salary | Year | Status | View |
|---|---|---|---|---|---|
| FPGA Silicon Design Verification Engineer 17-2072.00 | San Jose, CA | $150,904 | FY2025 | Certified | View |
| FPGA Silicon Design Verification Engineer 17-2072.00 | San Jose, CA | $177,648 | FY2025 | Certified | View |
| FPGA Silicon Design Verification Engineer 17-2072.00 | San Jose, CA | $189,848 | FY2025 | Certified | View |